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File:FG Interface 1 Main Layer.jpg

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Summary

Description (en) Main Layer with power source and shift level adaptateur. (RPi work on 3.3 volt while driver use 5 volt. To be sure to not destroy SDA and SCL input, a bidirectionnal shift level have been implémented with some 2N7000 Mos Fet transistor.
Date 4 July 2017 (2017-07-04), 13:34:29
Source Own work
Author Daweed

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Date/TimeThumbnailDimensionsUserComment
current11:43, 4 July 2017Thumbnail for version as of 11:43, 4 July 20171,092 × 750 (212 KB)Daweed (talk | contribs)User created page with UploadWizard

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